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SIMATIC S7-300, CPU 317-2DP/6ES7317-2AJ10-0AB0

 地址（ Add ）：上海市松江區(qū)弘翔路58號(hào)195

公司優(yōu)勢(shì)產(chǎn)品系列=西門子S7-200CN | S7-300PLC |  觸摸屏 | 變頻器 | 伺服電機(jī) | 數(shù)控系統(tǒng) | 總線電纜| 開關(guān)電源
DESCRIPTION: When the operating system is updated, it should always be updated to the latest version that is available for the relevant order no.. The previous versions of the operating system can be used for backup purposes, allowing you to downgrade to the original version, although as far as we are aware this has never been necessary.
The latest version of a CPU operating system is valid for all releases of this order no..

Prerequisites for creating an operating system update card:

• Micro Memory Card with 4 MB storage capacity
  (order number 6ES7953-8LM20-0AA0
• STEP 7 V5.1 + SP2 or higher
• PC with external PROM programmer (6ES7 792-0AA00-0XA0) or 
  PG720/740 with adapter (6ES7 798-0BA00-0XA0) or
  FieldPG/PowerPG  for programming the Micro Memory Card

Procedure for creating an operating system update card with STEP7:

1. Download the desired CPU file.
2. Unpack the file by double-clicking the file name.
3. Delete the Micro Memory Card by choosing "File/S7 Memory Card/Delete" in Simatic Manager.
4. Program the operating system by choosing in Simatic Manager "PLC/Update Operating System", select the destination directory and start programming by opening the CPU_HD.UPD file.
5. Programming of the operating system update card is completed when the message "The firmware update for the module with the order number 6ES7 317-2AJ10-0AB0 was transferred successfully to the S7 memory card" appears on the screen.

Executing the operating system update:

1. Switch OFF the power supply (PS) of the rack in which the CPU is located 
2. Isolate the PLC from the communication network
3. Insert the prepared operating system update card in the CPU
4. Switch ON the power supply (PS) for the rack in which the CPU is located
5. The operating system is transferred from the Micro Memory Card to the internal CPU flash EPROM. During this time all the CPU's LEDs will be on (FRCE, RUN, STOP, SF, BF).
6. The operating system update is completed after about 2 minutes and is indicated by the slow flashing of the STOP LED on the CPU => b for overall reset by the system
7. Switch the power OFF at the power supply and insert the Micro Memory Card required for operation.
8. Switch ON the power supply. The CPU automatically does an overall reset and is then immediaby ready for operation.
9. Before connecting the PLC to the communication network again the clock must be synchronized.

2. Online:

Prerequisites:

• On-line updating of the firmware is possible with STEP 7 V5.3 and higher.
• The module to be updated must be located in a station that can be reached on-line.
• An MMC must be inserted in the module.
• The files with the latest firmware version must be available on the file system of your programming device (PG or PC).
  One folder may only contain the files for one firmware version.

To update the operating system:

1. Start STEP 7 and switch to HW-Config.
2. Open the station with the CPU to be updated.
3. Earmark the CPU.
4. Select the menu option "Target system > Firmware update". The menu option can only be activated if the selected CPU supports the function "Firmware update".
5. In the opened menu option "Firmware update" use the "Search" button to select the path to the  firmware update files (*.UPD).
6. When you have selected a file, you will be told in the lower part of the "Firmware update" dialog field for which module and from which firmware version onwards the file is suitable.
7. Click the "Execute" button. STEP 7 will check whether the selected file can be interpreted by the module and - if the result is positive - load the file to the CPU. If the operating mode of the CPU has to be changed for this purpose you will be asked to perb this b. The CPU will then perb the firmware update on its own.
8. Check with STEP 7 (read CPU diagnostic buffer) whether the CPU successfully starts up with the new firmware.

Overview of order no.’s and latest versions of the CPU 317-2DP:

The above CPU version does not contain any new functions.

Note on STEP7-related dependencies:
To operate this CPU you require STEP7 V5.4 + SP2 or higher.
For CBA configuration you require iMap V3.0 + S7AddOn V3.0 SP2 or higher.

For failsafe applications you require the "S7 Distributed Safety" V5.2+SP1 option package.

Firmware update V2.6.10 provides the following corrections:

• The problem of loss of actual value during operation with event identifier 16#6523 and Z2=8020 / Z3=1410 has been corrected.
  
• No time interrupts are lost anymore during forcing.
  

• Fast scrolling when monitoring blocks or variables tables will no longer cause Defect Z1=6A6F.

• If both interfaces have been configured for DP, the CPU will no longer sporadically get stuck in startup after voltage OFF-ON and the operating mode switch in RUN.

• If in the setting "OB85 Call during I/O access error --> Only with coming and going errors" a missing DP slave whose addresses are stored in the process I/O image is disabled, the SF LED will now extinguish in addition to the BF LED.

• In the case of an ACCU1 value of , the instruction "RND" will now supply the correct value .

The above CPU version does not contain any new functions.

Note on STEP7-related dependencies and upward compatibility:
To operate this CPU you require STEP7 V5.2 SP1 + HSP0141 or higher.

Firmware update V2.6.5 provides the following corrections:

• If a connection is aborted during cyclic B&B reading (monitoring of blocks or variables), the CPU will no longer enter defect mode Z1=7173.
• Routing problems with the CP5613 A2 have been corrected.
• Connection establishment to operator panels has been improved.
• Monitoring of software blocks will no longer cause defect Z1=F204.
• Communication problems via Ethernet CPs, e.g. to a FM357, have been corrected.
• Loading the configuration from the SDB container will no longer lead to STOP because of a configuration inconsistency.
• Forcing of bs (PAI) is now also effective in alarm OBs.
• If a bit is set at b SD of SFCs 17, 18, 107 and 108, the complete byte will be set to zero.
• The callup beters of SFBs 52, 53, 75, 81 and SFCs 11, 51, 55-59 will only be checked if the REQ bit has been set; if the REQ bit has not been set, RET_VAL will not signal an error anymore.
• SFBs 52, 53 and 81 will no longer deliver RET_VAL 8092 if data type BLOCK_DB has been entered in the Parameter Record.
• Data types Word and DWord are now also permitted for the Parameter RECORD of SFBs 52 and 53.

The above CPU version includes the following new functions:

• Changed response of the CPU as clock master on MPI and DP interfaces - see Product Inbation / entry ID 26025920
• Additional write protection with SFC 109 ”PROTECT”

Note on STEP7 dependencies:

To operate this CPU you require STEP7 V5.2 SP1 + HSP0141 or higher.  

Firmware update V2.6.0 provides the following changes:

• Loading of projects with CP or FM modules in which the MPI address of the CPU has been changed no longer leads to error message "Station cannot be reached".
• Copy functions (especially in the case of SCL programming) with beters of the type ANY STRING now copy exactly the no. of data as listed in the lenght specification.
• When monitoring with callup path, it is now possible to specify up to 7 blocks for the callup environment.

• Clock synchronization on DP is now also possible with CPU318 and S7-400-CPUs as slave.

The above CPU version provides the following new features:

• Isochrone mode on DP
• Adjustable process I/O image
• Measuring initiator for diagnostic repeater (SFC 103)
• Additional software block related messages (SFC 105-108)
• Clock synchronization via DP
• Reset of the CPU to its delivery status
• Change protection stage with SFC 109 "PROTECT“

Note on STEP7-related dependencies and upward compatibility:
To operate this CPU you require STEP7 V5.2 SP1 + HSP0117 or higher.

Firmware update V2.5.0 provides the following corrections:

• When cyclic HMI reading is aborted Defect Z1:72C1 will now be prevented.
• Corrections were introduced for Defect Z1:F402 (when communication is cut).

• Forming of the status word display in the case of 32-bit multiplication with overflow has been improved.

• Rotating jobs with multiples of 32 are now calculated correctly and no longer lead to the result 0.

• Rounding of a negative 0 with RND will now supply the correct result 0.